Chapter 6
6
F6-1(1)
The upper layer API’s, USBD_BulkRx() , USBD_CtrlRx() , and USBD_IntrRx() ,
call USBD_EP_Rx() , where USBD_DrvEP_RxStart() is invoked.
On DMA-based controllers, this device driver API is responsible for queuing a
receive transfer. The queued receive transfer does not need to satisfy the whole
requested transfer length at once. If multiple transfers are queued only the last
queued transfer must be signaled to the USB device stack. This is required
since the USB device stack iterates through the receive process until all
requested data or a short packet has been received.
On FIFO-based controllers, this device driver API is responsible for enabling
data to be received into the endpoint FIFO, including any related ISR’s.
F6-1(2)
F6-1(3)
F6-1(4)
F6-1(5)
F6-1(6)
While data is being received, the device synchronous receive operation waits
on the device receive signal.
The USB device controller triggers an interrupt request when it is finished
receiving the data. This invokes the USB device driver interrupt service routine
(ISR) handler, directly or indirectly, depending on the architecture.
Inside the USB device driver ISR handler, the type of interrupt request is
determined to be a receive interrupt. USBD_EP_RxCmpl() is called to unblock
the device receive signal.
The device receive operation reaches the USBD_EP_Rx() , which internally calls
USBD_DrvEP_Rx() .
On DMA-based controllers, this device driver API is responsible for de-queuing
the completed receive transfer and returning the amount of data received. In
case the DMA-based controller requires the buffered data to be placed in a
dedicated USB memory region, the buffered data must be transferred into the
application buffer area.
On FIFO-based controllers, this device driver API is responsible for reading the
amount of data received by copying it into the application buffer area and
returning the data back to its caller.
The device receive operation iterates through the process until the amount of
data received matches the amount requested, or a short packet is received.
90
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